Chip Architecture for Data Sorting Using Recursive Algorithm
DOI:
https://doi.org/10.15415/jtmge.2010.11006Keywords:
Binary search tree, Field programmable gate arrays (FPGA), Recurssive Algorythms, very high speed integrated circuits hardware description language (VHDL)Abstract
“This paper suggests a way to implement recursive algorithm on hardware with an example of sorting of numeric data. Every recursive call/return needs a mechanism to store/restore parameters, local variables and return addresses respectively. Also a control sequence is needed to control the flow of execution as in case of recursive call and recursive return. The number of states required for the execution of a recursion in hardware can be reduced compared with software. This paper describes all the details that are required to implement recursive algorithm in hardware. For implementation, all the entities are designed using VHDL and are synthesized, configured on Spartan-2 XC2S200-5PQ208. “
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http://www.xilinx.com (Last viewed on 27/6/09)
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Articles in Journal of Technology Mangement for Growing Economies by Chitkara University Publications are Open Access articles that are published with licensed under a Creative Commons Attribution- CC-BY 4.0 International License. Based on a work at https://tmg.chitkara.edu.in. This license permits one to use, remix, tweak and reproduction in any medium, even commercially provided one give credit for the original creation.
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Journal of Technology Mangement for Growing Economies by Chitkara University Publications is licensed under a Creative Commons Attribution 4.0 International License. Based on a work at https://tmg.chitkara.edu.in/ |
